ISSN 0236-235X (P)
ISSN 2311-2735 (E)

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Higher Attestation Commission (VAK) - К1 quartile
Russian Science Citation Index (RSCI)

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Publication date:
16 June 2024

Articles of journal № 3 at 2017 year.

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Public date | Title | Authors

1. Identification of a complex technical system functional state under conditions of measurement data ambiguity [№3 за 2017 год]
Authors: A.A. Genov, K.D. Rusakov , S.Sh. Hill
Visitors: 8051
The article considers a topical problem of identification of a complex technical system functional state in conditions of increased noisiness using a transition to another attribute space of the observed state. The authors define the term “functional state”. The paper shows the problem of estimating a functional state as a dual problem of identification and pattern recognition. It pays attention to a possible selection of parameters of mathematical models and their structures as new signs of the observed state. As an example, in order to solve the parametric identification problem, the authors have selected the method of least squares. It shows the changing of the functional state. The process of analyzing measuring information plays an important role in the tasks of monitoring and testing by complex technical systems. Only after passing through all stages of processing, it is possible to decide on the condition of the test object. However, it is difficult to do in case of poor quality information. Elimination of this problem is mainly comes to searching solutions in order to form and improve relevant rules for management decision-making. At the same time, in normal conditions and situations, creation of such rules in many cases does not cause any special problems. Nevertheless, in abnormal conditions it is problematic. The state analysis of complex technical objects or their subsystems according to the measurement results assumes the solution of structural and parametric identification problems. Management of complex technical objects and their testing is characterized by uncertainty of external influence, anomalous and accidental measurement errors. To ensure the required quality of their subsystems state analysis, it is necessary to form the principles of identification process adaptive control, the methods of an optimal choice of a model structure based on the quality of measurement data. This is particularly topical for automation of secondary processing at terminal control facilities.

2. Multiprocess system debugging problems [№3 за 2017 год]
Authors: Galatenko V.A., Kostyukhin K.A.
Visitors: 7614
The article considers multiprocess complex systems debugging. The development of high-quality complex systems is a long and time-consuming process. It is believed that debugging takes about a half of this time. Switching to multi-core processor architectures has made parallelism a regular task, as well as errors specific for parallel systems. This makes debugging even more important and at the same time more complicated. The main feature of multiprocessing systems is using complex, asynchronous interactions between system components. This feature influences the approaches to debugging, determines the choice of debugging tools and methods. The complexity of debugging is also determined by the quantity and heterogeneity of multi-process system components, some of them might be hardware. A traditional set of debugging tools is the following: an interactive debugger, a tracer, self-monitoring libraries, reverse execution. Their application changes. The first chapter describes the existing debugging tools and techniques. The authors highlight their advantages and disadvantages. The next two chapters describe the existing problems of multiprocess system debugging. The fourth chapter provides the architecture of multiprocess system debugger. In conclusion authors present the results of their work.

3. High resolution video playback in virtual 3d environment in training simulation systems [№3 за 2017 год]
Authors: Giatsintov A.M., Mamrosenko K.A.
Visitors: 7869
The article describes the developed methods of high-resolution video playback in a visualization subsystem of training simulation systems (TSS). Usually TSS have a number of heterogeneous data resources. The following resource types are of interest for personnel training: dynamic process development charts; graphic materials of studied objects; 3D models of objects and their parts; simulation results in a video form; video records. Visualization subsystem provides rendering simulation results of environment and dynamic objects, and displaying the rendered image using display devices. Displaying videos in virtual 3D scenes is one of the requirements for TSS. Displaying videos inside a virtual 3D scene is a complex task, as many factors should be taken in account, such as performance of a video card and a visualization subsystem (renderer). A renderer should visualize a 3D scene with acceptable frame rate (not less than 25 frames per second) and respond to commands, such as a 3D scene transformation or new objects loading. The authors have developed and implemented a new decoder architecture in order to display several high definition videos in a virtual 3D scene. The architecture includes the following components: a decoder that decompresses audio and video packets; an audio playback system; a control module that allows starting, stopping playback, setting volume, etc.; an interface that interacts with a visualization subsystem, which is required for updating video images.

4. Potential distribution simulation for a dual-gate field silicon on insulator nanotransistor with an asymmetric gate [№3 за 2017 год]
Author: Masalsky N.V.
Visitors: 7130
The paper considers a 2D analytical model of potential distribution and a following threshold voltage model for a thin-film dual-gate field nanotransistor with "silicon-on-insulator" structure with a front gate from two sequentially connected materials with different work function. It also investigates potential behavior in transistor structures in the field of gate lengths less than 50 nanometers, its dependence on drain offsets for different configurations of a frontal gate. The received results show that using two materials with different work function in a frontal gate leads to effective suppression of short-channel effects due to a step function in a potential profile on the boundary of two materials. The shift of a surface line of a surface potential minimum is insignificant with increasing drain biases. The peak electric field at a drain considerably decreases in comparison with similar transistor structure but with a uniform frontal gate. At the same time, it is predicted to be a higher active interelectrode conductance and reduction of subthreshold leak in comparison with classical two-gate field nanotransistors with structure "silicon-on-insulator" in the gate lengths less than 50 nanometers. The distinctive properties of the researched structures are essential lowering of an electrical field peak on boundary of a working area and a drain, reduction of parasitic effects of threshold voltage. The simulation results are in good agreement with experiment data received by means of commercially available software package ATLAS intended for simulation of complex transistor structures. Thus, using two materials with different work function in a front gate of dual-gate field nanotransistors with the structure "silicon-on-insulator" improves their key electrophysical characteristics in comparison with dual-gate field transistors with a uniform front gate and volume analogues.

5. High-performance microprocessor 1890ВМ118 for trusted computing systems [№3 за 2017 год]
Authors: S.I. Aryashev , Bobkov S.G., P.S. Zubkovsky , S.А. Morev , B.Yu. Rogatkin
Visitors: 8265
This article considers the problems of developing a high-performance microprocessor for trusted computing systems. Microprocessor performance is determined by core capacity or a number of stages, which may be in execution simultaneously, and memory access time. Microprocessor applicability to create trusted systems is based on using self-made blocks and nodes. Microprocessor core performance is determined by three characteristics: clock frequency, operations per instruction, instruction rate. For 1890VM118 microprocessor these characteristics were optimized by performance/power parameter. Clock frequency increasing is achieved using custom development of timing critical blocks and pipeline length optimization. Hardware solutions, such as superscalar instruction execution, branch prediction and preliminary data load in cache memory, increase instruction rate. Implementation of the arithmetic co-processor focused on digital signal processing tasks allows increasing the number of operations per instruction. The paper considers increasing memory subsystem performance in terms of symmetric memory access for a dual-core microprocessor. It also describes the approach to implementing cache coherence in processor cores. The authors pay special attention to increasing the security level in microprocessor for trusted computing systems. They consider hardware solutions for operating system trusted boot and isolated memory access. To ensure trusted boot the authors suggest using on-chip ROM and one-time-programmable memory containing a secured bootloader and the keys to verify the signatures of an operating system. Isolated access solutions include a memory access controller discussed in the article and implemented inside a microprocessor. The paper proposes prospective solutions for creating trusted systems based on microprocessors by NIISI RAS.

6. A software complex for electronic system thermal design: requirements for architecture and functional possibilities of modeling [№3 за 2017 год]
Authors: Madera A.G., Reshetnikov V.N.
Visitors: 8260
The paper considers fundamental concepts of mathematical and computer modeling, which are the basis of the development and creation of a multifunctional software package for thermal design of complex electronic systems. It shows the basic flaws of foreign thermal design software systems, which are not applicable in practice of designing and creating competitive electronic systems. The article establishes the requirements for a multifunctional software package for adequate design of thermal processes and temperature distributions in real electronic systems under real conditions of operation and functioning. Namely, the software package should provide the ability to model thermal processes in electronic systems that are nonlinear, nonstationary, three-dimensional, interval stochastic, as well as take into account the influence of thermal feedback, design and installation of elements in electronic systems, effects of destabilizing mechanical, climatic and radiation factors. The architecture of the multifunctional software package should contain a highly efficient mathematical computing core, a de-veloped service user interface that meets modern requirements for complex software packages and systems. The service shell, in turn, should provide a visual, intuitive and easy-to-understand form of setting initial data in the form of color images of temperature distributions and other thermal characteristics at different hierarchical levels. The software package is implemented in Microsoft Visual Studio that provides an object-oriented approach in the high-level language C# powered by Microsoft Windows operating system family. Modular architecture allows expanding the possibilities and upgrading the software complex effectively.

7. Optimization problems solution based on superelement modeling of oil-field development [№3 за 2017 год]
Authors: I.V. Afanaskin , P.V. Yalov, Giatsintov A.M., A.V. Roditelev
Visitors: 6770
Oil fields of Russia are mainly developed by waterflooding. Most of them are in the 3rd or 4th stage of development. Consequently, the water cutting of well production is 80–90% or more. In these conditions, in order to optimize the development of deposits, oil engineers try to reduce water production and injection while maintaining or increasing oil production. For this purpose, there are the tasks of field development control and regulation. These problems are solved using various mathematical models. This paper considers a superelement mathematical waterflooding model based on a two-phase filtration model for weakly compressible immiscible liquids (oil and water) in an elastic bed under the Darcy law. The system of differential equations for pressure and saturation is approximated on Voronoi diagram in an entirely explicit manner. The size of the superelements is comparable to the distance between the wells. This allows performing calculations without using special software. To solve inverse problems (determine model coefficients or optimize development parameters), the work uses Newton's method and the conjugate gradient method. In the classical setting of an inverse problem, the optimization theory methods should be applied directly to the mathematical model of the process under study. However, when solving oilfield development problems, the number of optimization parameters can be large, and the complexity of the mathematical model is quite high. Therefore, the application of optimization theory methods directly to a mathematical model can be very time-consuming. To overcome this contradiction, it is proposed to build statistical dependencies of the development indices on the required parameters using a mathematical model of waterflooding, and then to apply optimization theory methods no longer to the mathematical model, but to the statistical dependencies obtained. To illustrate this approach, we consider the solution of the problem of model adaptation to absolute permeability. It is established that the application of the conjugate gradient method directly to the waterflooding model gives an error in determining the permeability of 11,8 %. Applying the same method to a statistical dependence of a model adaptation error (on accumulated production and injection of oil and water) on the logarithm of permeability gives an error in determining permeability of only a little more, it is 15 %.

8. Channels implementation of ARINC 653 specification in RTOS Baget 3 [№3 за 2017 год]
Authors: A.N. Godunov , V.A. Soldatov, I.I. Homenkov
Visitors: 9155
The article considers ARINC specification 653 channels, which are intended for interprocess communication. The paper proposes the basic methods of designing channel driver, as well as their interaction with the Russian real-time operating system Baget 3 (RTOS Baget 3). RTOS Baget 3 user interface is based on ARINC 653 Specification and POSIX standard. The channel ac-cess is performed through ports. Every channel has the only port for sending messages and a single or several destination ports for receiving messages. Messages can be sent through a channel in only one direction. An application program can use the channels in the processes that correspond both ARINC and POSIX. The paper specifies the requirements for channel drivers and describe notification control means used for driver development. It also considers the stages of initialization, sending/receiving messages and implemented algorithms. The proposed methods of im-plementing drivers interaction with RTOS allow avoiding data recording to the other process memory that significantly enhances the system reliability. Distributed computing systems use the same interface when separate subsystems are interconnected by means of shared access buses (VME, RapidIO, Fibre Channel) or Ethernet. The connection table for processor units is specified at the stage of system configuration. The channel driver, designed for RapidIO communication environment that offers fast operation speed, is used in a multiprocessor digital signal processing system.

9. Analysis of modern methods for vlsi project testing and verification [№3 за 2017 год]
Author: Slinkin D.I.
Visitors: 6836
VLSI development companies are keeping selected design flows and a testing process is a part of them. It is considered that from 60 % to 80 % of development teams’ efforts are spent on VLSI project verification and debugging. Debugging of register-transfer level (RTL) models is an important phase. There is no universal way to solve this problem. The article is devoted to the analysis of foreign and domestic publications on industrial VLSI project debugging. There are four main methodologies that are being considered: formal verification, simulation testing, using of hardware accelerators, prototyping based on programmable logic integrated circuits (FPGAs). For each of these methodologies there is information on an error detection method, existing software and hardware debugging tools. The paper analyzes some of their features, such as labor consumption, requirements for qualification and size of verification group, the cost of necessary tools and the availability of metrics to evaluate the test coverage. There are names of some industrial VLSI projects that used these methodologies, such as microprocessors, high-performance network switches, graphics processors. The paper mentions the tools used by the developers. Special attention is paid to debugging FPGA projects. The following approaches are considered: using the built-in logic analyzer, external control and measuring equipment and their combination. Finally, based on the practical experience the paper shows that four VLSI project debugging and verifying methodologies have different applications. It mentions the types of VLSI, which use one of these methodologies. Their advantages and disadvantages are briefly summarized.

10. Comparison of russian and foreign microprocessor performance [№3 за 2017 год]
Authors: N.D. Baykov , A.N. Godunov
Visitors: 10594
This article provides performance comparison for three different MIPS processors (RM7000, XLP316 and 1890VM8YA) and describes their architecture details. To compare processor performance, the testing technique is developed and implemented using C and Assembler. The technique consists of three consecutive stages. At the first stage the authors measure processor instructions execution time providing that both instructions and data required are already stored in a primary cache. The instructions are divided into several groups. There are the results for members of each group. Primary and secondary cache efficiency is benchmarked on the second stage. The article provides the results for secondary cache and RAM access time only. The third stage uses synthetic performance tests. The obtained results are compared with theoretical estimations based on the results of the first two stages. The advantage of the proposed technique is in its independence from compiler and operating system specified. All measurements are carried out in clock cycles using special purpose coprocessor registers.

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