ISSN 0236-235X (P)
ISSN 2311-2735 (E)

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Higher Attestation Commission (VAK) - К1 quartile
Russian Science Citation Index (RSCI)


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Publication date:
13 September 2024

Journal articles №4 2013

1. Russia needs to develope original supercomputing technology to compete on the global high tech production market [№4 за 2013 год]
Authors: ( - , Ph.D;
Abstract: Nowadays mastering predictive supercomputer modelling while developing the high-tech products is nessesary for the country to competie in the global high-tech markets. These technologies are classified as strategic and are not available on a commercial basis. This circumstance has determined the dangerous technological gap between Russia and the world leaders in aerospace, automotive, power engineering industries. Russia has quite significant position in the global energy market. And this position is the basis of economic, military and political security of the country. Therefore, Russia should build a technological development strategy to keep the share of the global energy market that is sufficient for sustainable socio -economic development of the country. It is impossible without creating national predictive supercomputing technologies for modeling of extraction and processing of hydrocarbons. Using the latest technologies in high-tech supercomputer simulation in industrial production and hydrocarbon production requires the use of supercomputing with a productivity rate of 1018 operations per second (exaflops). As a consequence, it also motivates to develop domestic technologies for the creation of supercomputers, new physical and mathematical models, numerical methods, computational schemes as well as new technologies to create application software systems
Keywords: domestic supercomputer technologies, the share of the world market, the global energy market, high-tech products, predictive modeling, exaflops, supercomputer
Visitors: 10072

2. On an approach to estimation of video-graphical information processing quality [№4 за 2013 год]
Authors: Koltsov P.P. ( - SRISA RAS, Ph.D;
Abstract: The paper describes the ideology of universal performance evaluation of computer programs. It is developed in SRISS RAS and implements one or another method of solving a problem of video-graphical information processing. It enables comparing programs effectiveness on a consistent basis to choose the most appropriate for use. The stated approach will allow developers of practical systems for video-graphical information processing to chose reasonably one or another software implementation to achieve the developer's task at the stage of the system's design. There are examples of the approach application for a comparative estimation of widely used computer implementations of solving tasks: edge detection, restoration, the boundaries clarifying, segmentation and texture analysis. Their stability for affine transformations is also investigated. External conditions were simulated by noising and a blurring of standardized set of reference images. The statistical and fuzzy measures, Euclidean and Hausdorff metrics are considered as universal performance evaluation. The given examples have allowed revealing the special features of the reviewed computer implementations and get their preferred application fields.
Keywords: specificity, sensitivity, segmentation, image restoration, edge detection, reference images, image processing
Visitors: 13634

3. Revolutionizing OF dielectric constant OF A silver nanofilm under voltage [№4 за 2013 год]
Authors: ( - , Ph.D; ( - ; ( - ; ( - ; ( - , Ph.D;
Abstract: The surface plasmon resonance (SPR) technique is used to detect a considerable change of the dielectric constant of a silver film when a constant voltage is applied to a MDM nanostructure. The structure looks like a capacitor with Ag films 49 nm and 37 nm thick as capacitor plates and a 177-nm Al2O3 film as the dielectric. The effect is a significant change of light reflectance when applied voltage is up to 30 V across the electrodes. A good match between the theory and experiment can be achieved with the assumption that the optical properties of silver change differently at the cathode and the anode, and the Al2O3 dielectric layer begins absorbing the light. The refraction of the cathode silver layer is shown to become zero when the voltage is greater than 16 V
Keywords: dielectric constant, DC voltage, nanoplates, surface plasmon resonance
Visitors: 9212

4. The possibility implementing mobile DVB-RCS standard satellite communication network with the spatial frequency resource time division in the Х-band [№4 за 2013 год]
Authors: A.A. Genov ( - Center of Visualization and Satellite Information Technologies SRISA (Professor, Leading Researcher), Ph.D; V.V. Osipov ( - Center of Visualization and Satellite Information Technologies SRISA (Associate Professor, Senior Researcher), Ph.D; S.B. Savilkin ( - Moscow Aviation Institute (National Research University) (Associate Professor), Ph.D;
Abstract: Nowadays satellite networks for mobile earth stations are implementing in the spacecrafts on geostationary orbit in direct relay mode with frequency-division multiplexing. The DVB-RCS standard with a spatial frequency TDMA involves placing on board a spacecraft multipath receiving-transmitting antenna and multi-board DVB-RCS standard digital platforms, providing multi-channel demodulation of earth stations sygnals. Using the DVB-RCS standard with MSF-TDMA can significantly extend the functional characteristics of mobile networks with satellites in a geostationary orbit. To use higher data transmition rate that as in DVB-RCS standard satellite communication networks, there is a need to increase the energy potential of satellite radio links "Statsionar" spacecraft. It can be achieved only whem establish multibeam receiver-transmit antennas on-board the "Statsionar" spacecraft. The "Statsionar" spacecraft modernisation is possible with the implementation of Multiservice onboard digital platforms and LAM in the spacecraft. It will allow using DVB-RCS (MSF-TDMA) mobile satellite communications standard in the X-band based on the AP-type "Belozer", which can help to organize high-speed direct connection between AP subscribers.
Keywords: dvb-rcs, distributed resources, mobile communication
Visitors: 10670

5. Energy costs, speed and heat sink in microprocessors [№4 за 2013 год]
Authors: Bobkov S.G. ( - Federal State Institution "Scientific Research Institute for System Analysis of the Russian Academy of Sciences" (SRISA RAS) (Professor, Deputy Director); Madera A.G. ( - SRISA RAS, Ph.D;
Abstract: The paper analyzes the physical principles of energy expenditure in modern microprocessors. The most part of the energy consumption is irreversibly dissipated as heat and another is spent on making all necessary operations. Transition of consumed energy to the heat causes microprocessors heating. It results in reliability decreasing and changing static and dynamic electrical parameters of microprocessors, as well as overranging their performance charachteristics resulting in failures, malfunction, etc. Because of the controversial requirements for increase of microprocessors speed while reducing energy expenditure, the issue of the relationship between the electrical parameters of microprocessors and their thermal processes is given special attention. There are the estimates of the perspectives of the physical principles of heat sink in microprocessors at different heat output. From the point of view of the fundamental capabilities of different cooling methods the obtained dependences show that the assessment of the microprocessor power consumption is still far from reaching their maximum physical limitations.
Keywords: thermal processes, energy costs, power consumption, high-performance computing systems, microprocessors
Visitors: 11333

6. Software pipelining of loops for a floating point accelerator in the Komdiv128-RIO processor [№4 за 2013 год]
Authors: ( - ; Galatenko V.A. ( - Scientific Research Institute for System Studies of the Russian Academy of Sciences (SRISA RAS), Ph.D; ( - ;
Abstract: The paper presents a method of software pipelining for a specialized floating point accelerator in the Komdiv128-RIO processor with MIPS architecture. Programs for the accelerator may be developed in Assember only. Implementation of a high level languages compiler is impossible due to architectural peculiarities of the accelerator. Manual writing of efficient computational loops for the accelerator is complicated. A programmer should keep in mind miltiple factors, such as lack of hardware delays on unready input data and complicated structure of the register file. The purpose of the work is to develop an instrument for automated software pipelining of loops for the specialized accelerator. A programmer may write quite simple internal loops which implement the calculations correctly but probably inefficiently. The loop is then transforming to a pipelined one with maximal calculating efficiency or close to the maximal one. Use of a precise approach based on integer linear programming (ILP) methods allows achieving the optimal efficiency of a code. The article is focused on specific points of the ILP task formulation connected with peculiarities of the accelerator architecture. The authors discuss the issues of exact calculation of the number of required registers as well as a problem of reducing the unroll factor of pipelined loops.
Keywords: predicated execution, Very Large Instruction Word (VLIW), floating point accelerator, integer linear programming (ILP), modulo scheduling, software pipelining, program optimization
Visitors: 10802

7. The regulatory base to design aerospace training systems [№4 за 2013 год]
Authors: Mamrosenko K.A. ( - SRISA RAS, Ph.D;
Abstract: International civil aviation organization (ICAO) has developed a Manual of Criteria for the Flight Simulation Training Devices Qualification (Doc 9625). This guide was created for civil aviation authorities and is aimed to provide methods of flight simulator qualification using initial and recurrent evaluations of the simulator. The document “Flight Simulator Design and Performance Data Requirements”, 7th edn, issued by the International Air Transport Association (2009) is related to the Doc 9625 and defines the requirements to the set of initial data (Data package) for the simulator design. In addition to the standards there is a technical guideline for the qualification – “Flight Simulator Evaluation Handbook”, vol. 1, 4th edn, Royal Aeronautical Society, London 2009. It includes descriptions of tests sequence necessary for correct certification. Similar documents have already been developed in Russia. After the simulator construction the developers must check if the simulator matches the real device. Up to 80 % of the project development time is spent on testing the mathematical model of object. It is quite difficult to reproduce all actions of the real system operator on the simulator. In this situation, automatic signal input can be used for simulator testing with data from the real system. It is necessary to pay attention to the fact that after assigning a certificate of a certain level by the FAA or JAA standards to the trainer, introduction of changes to the elements design, software, etc., including updating the components of the simulator, can lead to changes of all the systems characteristics. The simulator may cease to comply with the earlier assigned level. The information in this article is intended for organizations-developers, designing an architecture of the training systems.
Keywords: multimedia technologies, mathematical and computer modeling, distributed computing, training systems
Visitors: 16852

8. Design of high reliability multiprocessor modules based on high-performance RapidiO interconnect architecture [№4 за 2013 год]
Authors: Bobkov S.G. ( - Federal State Institution "Scientific Research Institute for System Analysis of the Russian Academy of Sciences" (SRISA RAS) (Professor, Deputy Director); ( - ; ( - , Ph.D; ( - , Ph.D;
Abstract: The paper contains the description of general approaches for designing and creating high-performance modules tolerant to the impact of external radiation factors and extreme thermal operation modes. The modules are based on the modern System-on-a-Chip (SoC) with technology-specific rules 180 nanometers or less. The article introduces the realization of these principles in the multiprocessor CP-RIO-64 module based on a chip (SoC) – 1890VM6IA. A new hardware-software technique for reliable program execution and a distributed control system for recovery are realized in the high-performance CP-RIO-64 module with RapidIO Interconnect Architecture. The RapidIO Interconnect Architecture is designed to be compatible with the most popular integrated communications processors, host processors and networking digital signal processors. It is a high-performance, packet-switched, interconnect technology. High Speed RISC Processor CP-RIO-64 module contains a RapidIO switch, several Systems-on-a-Chips, DDR SDRAM with ECC Support, Nand Flash memory blocks. The CP-RIO-64 module belongs to computer facilities. It can be used to create digital computer systems, which are carrying out real time data receiving by high speed RapidIO bus, preprocessing the signals (the space-time spectral analysis, the frequency ranges formation, the filtration and threshold detection) and also secondary, tertiary and general information processing including data exchange with other devices and systems.
Keywords: computer system, increasing stability, System-on-a-Chip (SoC), RapidIO switch, rapidio lp-serial, rapidio lp-lvds
Visitors: 8386

9. Preparation of detailed surface texture for high realistic Earth visualization [№4 за 2013 год]
Authors: Maltsev A.V. ( - SRISA RAS, Ph.D;
Abstract: One of the main criteria for providing highly realistic images when Earth model is rendered in the simulation-training complexes is to use Earth's detailed surface texture in visualization process. This paper proposes such texture preparation technology from initial set of same size tiles (photo images of Earth's small surface area). This texture can be subsequently used in applications that visualize Earth models and use distributed computing as well as ultra-large texture technology. The article consideres the decisions of the most important tasks regarding the described problem. Since original tiles are usually set in the Mercator projection, the algorithm is proposed to transform Mercator projection texture to equidistant cylindrical projection texture which is easier to use hereinafter. Also the way for seamless adding water surfaces to prepare texture is described if they are absent in the original set of tiles. It includes using special grayscale mask texture. The method of such a mask creation is proposed and described in one of the sections of this article. In addition, in the paper describes the software complex that has been created based on proposed technologies, methods and algorithms. This complex consists of three applications for Microsoft Windows operating system and one script for the Adobe Photoshop program. They allow user to prepare a required texture of Earth’s surface in a few steps.
Keywords: video trainers, texturing, planet models, high realistic visualization
Visitors: 9853

10. Nanotransitors circuitry simulation problems with silicon-on-insulator structure [№4 за 2013 год]
Authors: Masalsky N.V. ( - SRISA RAS, Ph.D;
Abstract: The paper discusses the features of physical simulation oriented on circuit CAD. The article is focused on the principles of constructing physical models of SOI MOSFET nanotransistor with reference to the circuit simulation SPICE program. The capabilities of actuation in the SPICE program of original SOI MOSFET nanotransistor models are analyzed. The procedure to adapt a transistor model for HSPICE circuit simulation means using the Opened interface of the given program is described. The author discusses a procedure allowing to optimize topological and electrophysical parameters of double gate SOI nanotransistors with a thin unalloyed working area, with underlap gate and drain/source regions considering the physical restrictions and process requirements. The selection criteria of the key topological parameters of transistors to implement the requirements according the International Technology Roadmap for Semiconductor 2012 Edition program for promising applications with a low power consumption level are discussed based on the numerical simulation results. The complex analysis of the transistor VACs and gate characteristics, such as a time switching delay, active and static power, shows that prototypes of the considered units are applicable for high-performance VLSI projects.
Keywords: low supply power, the logic gate, logic gate, SOI nanotransistor, hspice, circuitry simulation
Visitors: 11585

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